1. Field of the Invention
This invention relates to microprocessor systems. In particular, the invention relates to exception reporting.
2. Description of Related Art
Computing complex functions such as divide and square-root for floating-point arithmetic may be performed by hardware or software. Techniques to generate these functions usually involve iterative algorithms such as the Newton method. Implementing these functions by hardware requires specialized circuits to carry out the iterative steps and typically involves a large amount of silicon area. Therefore, it is more desirable to implement these functions by software methods. Software methods are based on the execution of a routine using primitives available in hardware such as multiplier and multiplier-accumulator.
One problem with computing complex functions using iterative algorithms is the occurrence of exceptions. An exception is an error condition caused by the computation of the functional argument during the iterative process. Examples of such an error condition include divide-by-zero and floating-point overflow/underflow. When there is an exception, it is necessary to report the exception in an efficient manner so that appropriate action can be taken.
A single instruction multiple data (SIMD) architecture operates on multiple data in parallel. A typical SIMD machine has N data storage elements that can be processed simultaneously. By processing N data storage elements in parallel, the computational throughput is improved N times over a single data machine. The speed advantage is even more significant when a number of complex functions can be generated in parallel utilizing the SIMD architecture.
When computing complex functions, an SIMD processor may generate exceptions during the iterative process. For N data elements, there may be N times the number of exceptions that may occur in the iterative processes. The overhead incurred to process these exceptions may be expensive and degrade performance.
Therefore there is a need to provide an efficient technique to report exceptions occurring in computing complex functions on an SIMD machine.